1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly, to an OTP (One-Time Programmable) ROM using a CMOS gate oxide antifuse.
2. Background of the Related Art
In fabricating a CMOS OTP nonvolatile memory, an antifuse device has been widely used. The antifuse is the opposite of a regular fuse. The antifuse is electrically an “open circuit” in a normal state, but becomes a “short circuit” if an insulator is broken through application of a high voltage, if necessary. An OTP ROM can be implemented with these two states.
A device used as an antifuse is mainly a metal-oxide-metal. Recently, there has been proposed a structure in which an Oxide-Nitride-Oxide (ONO) capacitor used in DRAM process is used as the antifuse. These structures, however, had a difficulty in implementation as follows and a problem in that the properties of the antifuse are poor.
Firstly, the above schemes required additional process in the existing standard CMOS process. Additional processes such as metal conductors, for example tungsten, aluminum, a dual-poly structure, ONO, etc, as both end electrodes of the antifuse are required.
Secondly, since it is difficult to uniformly control the thickness of an insulator through the process, it is also difficult to obtain uniform breakdown properties. Accordingly, there is a problem that a variation in a programming voltage of the antifuse is high.
Lastly, an existing ONO structure uses the antifuse of a capacitor type and has a complicate control circuit. Thus, there is a disadvantage that a large area per unit cell is needed.
For the above reasons, in fabricating a DRAM, an OTP ROM was implemented by using a process that allows for additional ONO or adding an additional process to an existing standard CMOS process. Furthermore, its applicable fields are limited to the recovery of defective memory cells having only several bit capacity.
As conventional technology for solving the aforementioned problems, there has been proposed a drift-nMOS antifuse as an antifuse OTP ROM that can be implemented with only the standard CMOS process.
The drift-nMOS antifuse is composed of an antifuse employing an n-well, n+-poly and gate oxide, and a drift-nMOS for blocking a high voltage. This structure, however, also has disadvantages that it requires an additional mask in the existing standard CMOS process and occupies a large area since one n-well per bit is used.